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Current Output, Parallel Input, 16-/14-Bit Multiplying DACs with 4-Quadrant Resistors AD5546/AD5556
FEATURES
16-bit resolution 14-bit resolution 2- or 4-quadrant multiplying DAC 1 LSB DNL 1 LSB INL or 2 LSB INL Operating supply voltage: 2.7 V to 5.5 V Low noise: 12 nV/Hz Low power: IDD = 10 A 0.5 s settling time Built-in RFB facilitates current-to-voltage conversion Built-in 4-quadrant resistors allow 0 V to -10 V, 0 V to +10 V, or 10 V outputs 2 mA full-scale current 20%, with VREF = 10 V Automotive operating temperature: -40C to +125C Compact TSSOP-28 package
FUNCTIONAL BLOCK DIAGRAM
R1 R1 RCOM R2 REF ROFS ROFS RFB
RFB IOUT
VDD
AD5546/ AD5556
CONTROL LOGIC
DAC 16/14 DAC REGISTER
WR LDAC DB0-DB15
GND
03810-0-001
POR
MSB
RS
Figure 1. AD5546/AD5556 Simplified Block Diagram
GENERAL DESCRIPTION
The AD5546/AD5556 are precision 16-/14-bit, multiplying, low power, current output, parallel input D/A converters. They operate from a single 2.7 V to 5.5 V supply with 10 V multiplying references for 4-quadrant outputs. Built-in 4-quadrant resistors facilitate the resistance matching and temperature tracking that minimize the number of components needed for multiquadrant applications. The feedback resistor (RFB) simplifies the I-V conversion with an external buffer. The AD5546/ AD5556 are packaged in compact TSSOP-28 packages with operating temperatures from -40C to +125C.
APPLICATIONS
Automatic test equipment Instrumentation Digitally controlled calibration Digital waveform generation
5V
2 VIN U3
+
ADR03
TRIM VOUT GND 4 5 6 R1
R1
OP2177
- C1 -VREF REF R2 +VREF ROF ROFS RFB RFB C2
U2A
RCOM
5V
VDD
AD5546/AD5556
16/14 DATA GND
U1
16/14-BIT
IOUT
-
OP2177
+
U2B
VOUT
-VREF TO +VREF
WR LDAC RS WR LDAC RS MSB
MSB
Figure 2. 16-/14-Bit, 4-Quadrant Multiplying DAC with a Minimum of External Components Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 (c) 2004 Analog Devices, Inc. All rights reserved.
03810-0-002
AD5546/AD5556 TABLE OF CONTENTS
Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 5 Pin Configurations and Functional Descriptions ........................ 6 Typical Performance Characteristics ............................................. 8 Circuit Operation ........................................................................... 11 D/A Converter Section .............................................................. 11 Digital Section............................................................................. 12 ESD Protection Circuits............................................................. 12 Amplifier Selection..................................................................... 12 Reference Selection .................................................................... 12 Applications..................................................................................... 13 Unipolar Mode ........................................................................... 13 Bipolar Mode .............................................................................. 14 AC Reference Signal Attenuator............................................... 15 System Calibration ..................................................................... 15 Outline Dimensions ....................................................................... 16 Ordering Guide .......................................................................... 16
REVISION HISTORY
Revision 0: Initial Version
Rev. 0 | Page 2 of 16
AD5546/AD5556 SPECIFICATIONS
Table 1. Electrical Characteristics. VDD = 2.7 V to 5.5 V, IOUT = virtual GND, GND = 0 V, VREF = -10 V to 10 V, TA = full operating temperature range, unless otherwise noted.
Parameter STATIC PERFORMANCE1 Resolution Resolution Relative Accuracy Relative Accuracy Differential Nonlinearity Output Leakage Current Output Leakage Current Full-Scale Gain Error Bipolar Mode Gain Error Bipolar Mode Zero-Scale Error Full-Scale Tempco2 REFERENCE INPUT VREF Range REF Input Resistance R1 and R2 Resistance R1-to-R2 Mismatch Feedback and Offset Resistance Input Capacitance2 ANALOG OUTPUT Output Current Output Capacitance2 LOGIC INPUT AND OUTPUT Logic Input Low Voltage Logic Input Low Voltage Logic Input High Voltage Logic Input High Voltage Input Leakage Current Input Capacitance2 INTERFACE TIMING2, 3 Data to WR Setup Time Data to WR Hold Time WR Pulse Width LDAC Pulse Width RS Pulse Width WR to LDAC Delay Time Symbol N N INL INL DNL IOUT IOUT GFSE GE GZSE TCVFS VREF REF R1 and R2 (R1 to R2) RFB, ROFS CREF IOUT COUT VIL VIL VIH VIH IIL CIL tDS tDH tWR tLDAC tRS tLWD Data = full scale Code dependent VDD = 5 V VDD = 3 V VDD = 5 V VDD = 3 V -18 4 4 8 Conditions AD5546, 1 LSB = VREF/216 = 153 V at VREF = 10 V AD5556, 1 LSB = VREF/214 = 610 V at VREF = 10 V Grade: AD5556C Grade: AD5546B Monotonic Data = zero scale, TA = 25C Data = zero scale, TA = TA maximum Data = full scale Data = full scale Data = full scale Min Typ 16 14 1 2 1 10 20 4 4 2.5 Max Unit Bits Bits LSB LSB LSB nA nA mV mV mV ppm/C +18 6 6 1.5 12 V k k k pF mA pF 0.8 0.4 2.4 2.1 10 10 VDD = 5 V VDD = 3 V VDD = 5 V VDD = 3 V VDD = 5 V VDD = 3 V VDD = 5 V VDD = 3 V VDD = 5 V VDD = 3 V VDD = 5 V VDD = 3 V 20 35 0 0 20 35 20 35 20 35 0 0 V V V V A pF ns ns ns ns ns ns ns ns ns ns ns ns
1 1 1 1
5 5 0.5 10 5 2 200
Rev. 0 | Page 3 of 16
AD5546/AD5556
Parameter SUPPLY CHARACTERISTICS Power Supply Range Positive Supply Current Power Dissipation Power Supply Sensitivity AC CHARACTERISTICS4 Output Voltage Settling Time Reference Multiplying BW DAC Glitch Impulse Multiplying Feedthrough Error Digital Feedthrough Total Harmonic Distortion Output Noise Density Symbol VDD RANGE IDD PDISS PSS tS BW Q VOUT/VREF QD THD eN Condition Min 2.7 Logic inputs = 0 V Logic inputs = 0 V VDD = 5% To 0.1% of full scale, data cycles from zero scale to full scale to zero scale VREF = 5 V p-p, data = full scale VREF = 0 V, midscale to midscale minus 1 VREF = 100 mV rms, f = 10 kHz WR = 1, LDAC toggles at 1MHz VREF = 5 V p-p, data = full-scale, f = 1 KHz f = 1 kHz, BW = 1 Hz 0.5 4 7 -65 7 -85 12 Typ Max 5.5 10 0.055 0.003 Unit V A mW %/% s MHz nV-s dB nV-s dB nV/rt Hz
1
All static performance tests (except IOUT) are performed in a closed-loop system, using an external precision OP97 I-V converter amplifier. The AD554x RFB terminal is tied to the amplifier output. The op amp +IN is grounded and the DAC IOUT is tied to the op amp -IN. Typical values represent average readings measured at 25C. 2 These parameters are guaranteed by design and not subject to production testing. 3 All input control signals are specified with tR = tF = 2.5 ns (10% to 90% of 3 V), and timed from a voltage level of 1.5 V. 4 All ac characteristic tests are performed in a closed-loop system using an AD841 I-V converter amplifier.
Rev. 0 | Page 4 of 16
AD5546/AD5556 ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter VDD to GND RFB, ROFS, R1, RCOM, and REF to GND Logic Inputs to GND V(IOUT) to GND Input Current to Any Pin except Supplies Thermal Resistance (JA) Maximum Junction Temperature (TJ MAX) Operating Temperature Range Storage Temperature Range Lead Temperature: Vapor Phase, 60 s Infrared, 15 s Package Power Dissipation Rating -0.3 V, +8 V -18 V, 18 V -0.3 V, +8 V -0.3 V, VDD + 0.3 V 50 mA 128C 150C -40C to +125C -65C to +150C 215C 220C (TJ MAX - TA)/JA
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
Rev. 0 | Page 5 of 16
AD5546/AD5556 PIN CONFIGURATIONS AND FUNCTIONAL DESCRIPTIONS
D7 1 D6 2 D5 3 D4 4 D3 5 D2 6 D1 7
28 27 26 25 24
VDD D8 D9 D10 D11 D12
D5 1 D4 2 D3 3 D2 4 D1 5 D0 6 NC 7
28 VDD 27 D6 26 D7 25 D8 24 D9
22 D13 TOP VIEW D0 8 (Not to Scale) 21 D14
AD5546
23
22 D11 TOP VIEW NC 8 (Not to Scale) 21 D12
AD5556
23 D10
ROFS 9 RFB 10 R1 11 RCOM 12 REF 13 IOUT 14
20 19 18 17 16 15
D15 GND RS MSB
03810-0-003
ROFS 9 RFB 10 R1 11 RCOM 12 REF 13 IOUT 14
20 D13 19 GND 18 RS 17 MSB 16 WR 15 LDAC
03810-0-004
WR LDAC
NC = NO CONNECT
Figure 3.AD5546 Pin Configuration
Figure 4. AD5556 Pin Configuration
Table 3. AD5546 Functional Descriptions
Pin No. 1-8 9 10 11 12 13 Mnemonic D7 to D0 ROFS RFB R1 RCOM REF Description Digital Input Data Bits D7 to D0. Signal level must be VDD + 0.3 V. Bipolar Offset Resistor. Accepts up to 18 V. In 2-quadrant mode ties to RFB. In 4-quadrant mode ties to R1 and external reference. Internal Matching Feedback Resistor. Connects to the output of an external op amp for I-V conversion. 4-Quandrant Resistor R1. In 2-quadrant mode shorts to REF pin. In 4-quadrant mode ties to ROFS. Center Tap Point of Two 4-Quadrant Resistors, R1 and R2. In 4-quadrant mode, ties to the inverting node of the reference amplifier. In 2-quadrant mode, shorts to REF pin. DAC Reference Input in 2-Quadrant Mode and R2 Terminal in 4-Quadrant Mode. In 2-quadrant mode, this is the reference input with constant input resistance versus code. In 4-quadrant mode, this pin is driven by the external reference amplifier. DAC Current Output. Connects to the inverting node of an external op amp for I-V conversion. Digital Input Load DAC Control. Signal level must be VDD + 0.3 V. Write Control Digital Input in Active Low. Transfers shift-register data to DAC register on rising edge. Signal level must be VDD + 0.3 V. Power-On Reset State. MSB = 0 resets at zero scale, MSB = 1 resets at midscale. Signal level must be VDD + 0.3 V. Reset in Active Low. Resets to zero scale if MSB = 0, and resets to midscale if MSB = 1. Signal level must be VDD + 0.3 V. Analog and Digital Grounds. Digital Input Data Bits D15 to D14. Signal level must be VDD + 0.3 V. Digital Input Data Bits D13 to D8. Signal level must be VDD + 0.3 V. Positive Power Supply Input. Specified range of operation: 2.7 V to 5.5 V.
14 15 16 17 18 19 20-21 22-27 28
IOUT LDAC WR MSB RS GND D15 to D14 D13 to D8 VDD
Table 4. AD5556 Functional Descriptions
Pin No. 1-6 7-8 9 10 11 12 13 Mnemonic D5 to D0 NC ROFS RFB R1 RCOM REF Description Digital Input Data Bits D5 to D0. Signal level must be VDD+0.3 V. No Connection. User should not connect anything other than dummy pads on these terminals. Bipolar Offset Resistor. Accepts up to 18 V. In 2-quadrant mode ties to RFB. In 4-quadrant mode ties to R1 and external reference. Internal Matching Feedback Resistor. Connects to the output of an external op amp for I-V conversion. 4-Quandrant Resistor R1. In 2-quadrant mode shorts to REF pin. In 4-quadrant mode ties to ROFS. Center Tap Point of Two 4-Quadrant Resistors, R1 and R2. In 4-quadrant mode, ties to the inverting node of the reference amplifier. In 2-quadrant mode, shorts to REF pin. DAC Reference Input in 2-Quadrant Mode and R2 Terminal in 4-Quadrant Mode. In 2-quadrant mode, this is the reference input with constant input resistance versus code. In 4-quadrant mode, this pin is driven by the external reference amplifier. DAC Current Output. Connects to the inverting node of an external op amp for I-V conversion.
Rev. 0 | Page 6 of 16
14
IOUT
AD5546/AD5556
Pin No. 15 16 17 18 19 20-27 28 Mnemonic LDAC WR MSB RS GND D13 to D6 VDD Description Digital Input Load DAC Control. Signal level must be VDD + 0.3 V. Write Control Digital Input in Active Low. Transfers shift-register data to DAC register on rising edge. Signal level must be VDD + 0.3 V. Power On Reset State. MSB = 0 resets at zero-scale, MSB = 1 resets at midscale. Signal level must be VDD + 0.3 V. Reset in Active Low. Resets to zero-scale if MSB = 0 and resets to midscale if MSB = 1. Signal level must be VDD + 0.3 V. Analog and Digital Grounds. Digital Input Data Bits D13 to D6. Signal level must be VDD + 0.3 V. Positive power supply input. Specified range of operation: 2.7 V to 5.5 V.
tWR
WR
DATA
tDS
LDAC
tDH tLWD
tLDAC
RS
Figure 5. AD5546/AD5556 Timing Diagram
Table 5. AD5546 Parallel Input Data Format
Bit Position Data Word MSB B15 D15 B14 D14 B13 D13 B12 D12 B11 D11 B10 D10 B9 D9 B8 D8 B7 D7 B6 D6 B5 D5 B4 D4 B3 D3 B2 D2 B1 D1 LSB B0 D0
Table 6. AD5556 Parallel Input Data Format
Bit Position Data Word MSB B13 D13 B12 D12 B11 D11 B10 D10 B9 D9 B8 D8 B7 D7 B6 D6 B5 D5 B4 D4 B3 D3 B2 D2 B1 D1 LSB B0 D0
Table 7. Control Inputs
RS 0 1 1 1 1 1 WR X 0 1 0 LDAC X 0 1 1 Register Operation Reset output to 0, with MSB pin = 0. Midscale with MSB pin = 1. Load input register with data bits. Load DAC register with the contents of the input register. Input and DAC registers are transparent. When LDAC and WR are tied together and programmed as a pulse, the data bits are loaded into the input register on the falling edge of the pulse, and then loaded into the DAC register on the rising edge of the pulse. No register operation.
1
0
Rev. 0 | Page 7 of 16
03810-0-005
tRS
AD5546/AD5556 TYPICAL PERFORMANCE CHARACTERISTICS
1.0 0.8 0.6 0.4
DNL (LSB)
03810-0-006
1.0 0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 -1.0 0 0248 4096 6144 8192
03810-0-009
INL (LSB)
0.2 0 -0.2 -0.4 -0.6 -0.8 -1.0 0 8192
16384 24576 32768 40960 49152 57344 65536 CODE (Decimal)
10240 12288 14336 16384
CODE (Decimal)
Figure 6. AD5546 Integral Nonlinearity Error
1.5
Figure 9. AD5556 Differential Nonlinearity Error
1.0 0.8 0.6 0.4
VREF = 2.5V TA = 25C 1.0
LINEARITY ERROR (LSB)
0.5 INL 0 DNL -0.5
DNL (LSB)
0.2 0 -0.2 -0.4 -0.6
03810-0-007
-0.8 -1.0 0 8192
GE
16384 24576 32768 40960 49152 57344 65536 CODE (Decimal)
-1.5
2
4
6 8 SUPPLY VOLTAGE VDD (V)
10
Figure 7. AD5546 Differential Nonlinearity Error
Figure 10. Linearity Error vs. VDD
1.0 0.8
5 VDD = 5V TA = 25C
SUPPLY CURRENT IDD (LSB)
0.6 0.4
4
INL (LSB)
0.2 0 -0.2 -0.4 -0.6 -0.8 -1.0 0 2048 4096 6144 8192
03810-0-008
3
2
1
03810-0-011
0
10240 12288 14336 16384
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
CODE (Decimal)
LOGIC INPUT VOLTAGE VIH (V)
Figure 8. AD5556 Integral Nonlinearity Error
Figure 11. Supply Current vs. Logic Input Voltage
Rev. 0 | Page 8 of 16
03810-0-010
-1.0
AD5546/AD5556
3.0 2.5
SUPPLY CURRENT (mA)
LDAC (5V/DIV)
2.0 0x5555 1.5 0x8000 1.0 0xFFFF 0x0000
03810-0-012
VDD = 5V VREF = 10V CODES 0x8000 0x7FFF
VOUT (50mV/DIV)
03810-0-015
0.5
0 10k
100k
1M CLOCK FREQUENCY (Hz)
10M
100M
0
0.5
1.0
1.5
2.0
2.5 3.0 TIME (s)
3.5
4.0
4.5
5.0
Figure 12. AD5546 Supply Current vs. Clock Frequency
Figure 15. AD5546 Midscale Transition and Digital Feedthrough
90 80 70 60
PSSR (-dB)
VDD = 5V 10% VREF = 10V
50 40 30 20
03810-0-013
0xFFFF 0x8000 0x4000 0x2000 0x1000 0x0800 0x0400 0x0200 0x0100 0x0080 0x0040 0x0020 0x0010 0x0008 0x0004 0x0002 0x0001 0x0000
REF LEVEL 0.000dB
/DIV 12.000dB
MARKER 4 41 677.200Hz MAG (A/R) -2.939db -12dB -24dB -36dB -48dB -60dB -72dB -84dB -96dB -108dB
03810-0-016
10 0 10 100 1k 10k FREQUENCY (Hz) 100k 1M
10 100 START 10.000Hz
1k
10k
100k 1M 10M STOP 50 000 000.000Hz
Figure 13. Power Supply Rejection Ratio vs. Frequency
Figure 16. AD5546 Unipolar Reference Multiplying Bandwidth
REF LEVEL 0.000dB
ALL BITS ON D15 AND D14 ON D15 AND D13 ON D15 AND D12 ON D15 AND D11 ON D15 AND D10 ON D15 AND D9 ON D15 AND D8 ON D15 AND D7 ON D15 AND D6 ON D15 AND D5 ON D15 AND D4 ON D15 AND D3 ON D15 AND D2 ON D15 AND D1 ON
0 -12
1
/DIV 12.000dB
LDAC
-24 -36 -48
2
-60 -72 -84
VOUT
03810-0-014
-96 -108
D15 AND D0 ON D15 ON
03810-0-017
CH1 5.00V CH2 2.00V
M 200ns
A CH1 2.70V B CH1 -6.20V 400.00ns
-120 10 100 START 10.000Hz
1k
10k
100k 1M 10M STOP 10 000 000.000Hz
Figure 14. Settling Time from Full Scale to Zero Scale
Figure 17. AD5546 Bipolar Reference Multiplying Bandwidth (Codes from Midscale to Full Scale)
Rev. 0 | Page 9 of 16
AD5546/AD5556
0 -12 -24 -36 -48 -60 -72 -84 -96 -108
D14 AND D0 ON D14 ON
03810-0-018
REF LEVEL 0.000dB
ALL BITS OFF D14 ON D14 AND D13 ON D14 AND D12 ON D14 AND D11 ON D14 AND D10 ON D14 AND D9 ON D14 AND D8 ON D14 AND D7 ON D14 AND D6 ON D14 AND D5 ON D14 AND D4 ON D14 AND D3 ON D14 AND D2 ON D14 AND D1 ON
/DIV 12.000dB
-120 10 100 START 10.000Hz
1k
10k
100k 1M 10M STOP 10 000 000.000Hz
Figure 18. AD5546 Bipolar Reference Multiplying Bandwidth (Codes from Midscale to Zero Scale)
Rev. 0 | Page 10 of 16
AD5546/AD5556 CIRCUIT OPERATION
D/A CONVERTER SECTION
The AD5546/AD5556 are 16-/14-bit multiplying, current output, and parallel input DACs. The devices operate from a single 2.7 V to 5.5 V supply, and provide both unipolar 0 V to -VREF, or 0 V to +VREF, and bipolar VREF output ranges from a -18 V to +18 V reference. In addition to the precision conversion RFB commonly found in current output DACs, there are three additional precision resistors for 4-quadrant bipolar applications. The AD5546/AD5556 consist of two groups of precision R-2R ladders, which make up the 12/10 LSBs, respectively. Furthermore, the four MSBs are decoded into 15 segments of resistor value 2R. Figure 19 shows the architecture of the 16-bit AD5546. Each of the 16 segments in the R-2R ladder carries an equally weighted current of one-sixteenth of full scale. The feedback resistor, RFB, and 4-quadrant resistor, ROFS, have values of 10 k. Each 4-quadrant resistor, R1 and R2, equals 5 k. In 4-quadrant operation, R1, R2, and an external op amp work together to invert the reference voltage and apply it to the REF input. With ROFS and RFB connected as shown in Figure 2, the output can swing from -VREF to +VREF. The reference voltage inputs exhibit a constant input resistance of 5 k 20%. The DAC output, IOUT, impedance is code dependent. External amplifier choice should take into account the variation of the AD5546/AD5556 output impedance. The feedback resistance in parallel with the DAC ladder resistance dominates output voltage noise. To maintain good analog performance, it is recommended to bypass the power supply with a 0.01 F to 0.1 F ceramic or chip capacitor in parallel with a 1 F tantulum capacitor. Also, to minimize gain error, PCB metal traces between VREF and RFB should match. Every code change of the DAC corresponds to a step function; gain peaking at each output step may occur if the op amp has limited GBP and excessive parasitic capacitance present at the op amp inverting node. A compensation capacitor, therefore, may be needed between the I-V op amp inverting and output nodes to smooth the step transition. Such a compensation capacitor should be found empirically, but a 20 pF capacitor is generally adequate for the compensation. The VDD power is used primarily by the internal logic and to drive the DAC switches. Note that the output precision degrades if the operating voltage falls below the specified voltage. Users should also avoid using switching regulators because device power supply rejection degrades at higher frequencies.
2R 80k 4 MSB 15 SEGMENTS R 40k 2R 80k R 40k 2R 80k R 40k 2R 80k R 40k 2R 80k R 40k 2R 80k R 40k 2R 80k R 40k 2R 80k R 40k 2R 80k 2R 80k 8-BIT R2R ROFS RA RB R 2R 80k R 2R 80k R 2R 80k R 2R 80k 2R 80k 4-BIT R2R IOUT GND 16 8 4 ADDRESS DECODER 10k RFB 10k
REF R2 5k RCOM R1 5k R1 2R 80k 2R 80k 2R 80k
LDAC
LDAC
DAC REGISTER
RS
RS
WR
WR
INPUT REGISTER
RS
03810-0-019
D15 D14
D0
Figure 19. 16-Bit AD5546 Equivalent R-2R DAC Circuit with Digital Section
Rev. 0 | Page 11 of 16
AD5546/AD5556
DIGITAL SECTION
The AD5546/AD5556 have 16-/14-bit parallel inputs. The devices are double-buffered with 16-/14-bit registers. The double-buffered feature allows the update of several AD5546/ AD5556 simultaneously. For AD5546, the input register is loaded directly from a 16-bit controller bus when the WR pin is brought low. The DAC register is updated with data from the input register when LDAC is brought high. Updating the DAC register updates the DAC output with the new data (see Figure 19). To make both registers transparent, tie WR low and LDAC high. The asynchronous RS pin resets the part to zero scale if MSB pin = 0, and midscale if MSB pin = 1.
AMPLIFIER SELECTION
In addition to offset voltage, the bias current is important in op amp selection for precision current output DACs. An input bias current of 30 nA in the op amp contributes to 1 LSB in the AD5546's full-scale error. Op amps OP1177 and AD8628 are good candidates for the I-V conversion.
REFERENCE SELECTION
The initial accuracy and the rated output of the voltage reference determine the full span adjustment. The initial accuracy is usually a secondary concern in precision, as it can be trimmed. Figure 25 shows an example of a trimming circuit. The zero scale error can also be minimized by standard op amp nulling techniques. The voltage reference temperature coefficient and long-term drift are primary considerations. For example, a 5 V reference with a TC of 5 ppm/oC means that the output changes by 25 V per degree Celsius. As a result, the reference that operates at 55oC contributes an additional 750 V full-scale error. Similarly, the same 5 V reference with a 50 ppm long-term drift means that the output may change by 250 V over time. Therefore, it is practical to calibrate a system periodically to maintain its optimum precision.
ESD PROTECTION CIRCUITS
All logic input pins contain back-biased ESD protection Zeners connected to ground (GND) and VDD, as shown in Figure 20. As a result, the voltage level of the logic input should not be greater than the supply voltage.
VDD DIGITAL INPUTS
5k
DGND
Figure 20. Equivalent ESD Protection Circuits
03810-0-020
Rev. 0 | Page 12 of 16
AD5546/AD5556 APPLICATIONS
UNIPOLAR MODE
2-Quadrant Multiplying Mode, VOUT = 0 V to -VREF
The AD5546/AD5556 DAC architecture uses a current-steering R-2R ladder design that requires an external reference and op amp to convert the unipolar mode of output voltage to VOUT = -VREF x D/65,536 VOUT = -VREF x D/16,384 (AD5546) (AD5556) (1) (2)
2-Quadrant Multiplying Mode, VOUT = 0 V to +VREF
The AD5546/AD5556 are designed to operate with either positive or negative reference voltages. As a result, positive output can be achieved with an additional op amp, (see Figure 22), and the output becomes VOUT = +VREF x D/65,536 VOUT = +VREF x D/16,384 (AD5546) (AD5556) (3) (4)
where D is the decimal equivalent of the input code. The output voltage polarity is opposite to the VREF polarity in this case (see Figure 21). Table 8 shows the negative output versus code for the AD5546. Table 8. AD5546 Unipolar Mode Negative Output vs. Code
D in Binary 1111 1111 1111 1111 1000 0000 0000 0000 0000 0000 0000 0001 0000 0000 0000 0000 VOUT (V) -VREF(65,535/65,536) -VREF/2 -VREF(1/65,536) 0
Table 9 shows the positive output versus code for the AD5546. Table 9. AD5546 Unipolar Mode Positive Output vs. Code
D in Binary 1111 1111 1111 1111 1000 0000 0000 0000 0000 0000 0000 0001 0000 0000 0000 0000 VOUT (V) +VREF(65,535/65,536) +VREF/2 +VREF(1/65,536) 0
+5V C1 1F C2 0.1F
2 VIN U3
ADR03
TRIM VOUT GND 4 R1
R1
5
RCOM R2
REF
ROFS ROFS
RFB RFB
C6 2.2pF
VDD C3 0.1F
AD5546/AD5556
GND 16/14 DATA WR LDAC RS WR LDAC RS MSB MSB
U1
16/14-BIT
IOUT
-
AD8628
+ V- C4 0.1F
V+ U2
VOUT -2.5V TO 0V
Figure 21. Unipolar 2-Quadrant Multiplying Mode, VOUT = 0 to -VREF
Rev. 0 | Page 13 of 16
03810-0-021
-5V
C5 1F
AD5546/AD5556
+ V+ U2A - V- 2 C2 0.1F VIN U3
AD8628
+5V C1 1F C8 0.1F
ADR03
TRIM VOUT GND 4 5 6 +2.5V -5V
C9 1F C7
-2.5V
R1A
RCOMA R2
REFA
ROFSA ROFS
RFBA C6 RFB
+5V
C4 1F
R1
VDD C3 0.1F
AD5546/AD5556
GND 16/14 DATA WR LDAC RS WR LDAC RS MSB MSB
U1
16/14-BIT
IOUT
-
AD8628
+ V-
C5 0.1F V+ U2B
VOUT 0V TO +2.5V
Figure 22. Unipolar 2-Quadrant Multiplying Mode, VOUT = 0 to +VREF
+15V C1 1F C2 0.1F 2 VIN U3 +
ADR01
TRIM VOUT GND 4 5 6
AD8512
- C8 -10V +10V
U2A
R1
R1
RCOM R2
REF
ROF ROFS
RFB RFB C9 IOUT
+15V
C4 1F
+5V C3 0.1F
VDD
AD5546/AD5556
GND 16/14 DATA WR LDAC RS WR LDAC RS MSB MSB
U1
16/14-BIT
-
AD8512
+ V-
C5 0.1F V+ U2B C6 0.1F
VOUT -10V TO +10V
Figure 23. 4-Quadrant Multiplying Mode, VOUT = -VREF to +VREF
BIPOLAR MODE
4-Quadrant Multiplying Mode, VOUT = -VREF to +VREF
The AD5546/AD5556 contain on-chip all the 4-quadrant resistors necessary for the precision bipolar multiplying operation. Such a feature minimizes the number of exponent components to only a voltage reference, dual op amp, and compensation capacitor (see Figure 23). For example, with a 10 V reference, the circuit yields a precision, bipolar -10 V to +10 V output.
VOUT = (D/32768 - 1) x VREF (AD5546) VOUT = (D/16384 - 1) x VREF (AD5556) (5) (6)
Rev. 0 | Page 14 of 16
03810-0-023
C7 -15V 1F
03810-0-022
AD5546/AD5556
Table 10 shows some of the results for the 16-bit AD5546. Table 10. AD5546 Output vs. Code
D in Binary 1111 1111 1111 1111 1000 0000 0000 0001 1000 0000 0000 0000 0111 1111 1111 1111 0000 0000 0000 0000 VOUT +VREF(32,767/32,768) +VREF(1/32,768) 0 -VREF(1/32,768) -VREF
ac reference signals for signal attenuation, channel equalization, and waveform generation applications. The maximum signal range can be up to 18 V (see Figure 24).
SYSTEM CALIBRATION
The initial accuracy of the system can be adjusted by trimming the voltage reference ADR0x with a digital potentiometer (see Figure 25). The AD5170 provides an OTP (one time programmable), 8-bit adjustment that is ideal and reliable for such calibration. ADI's OTP digital potentiometer comes with programmable software that simplifies the factory calibration process.
AC REFERENCE SIGNAL ATTENUATOR
Besides handling digital waveforms decoded from parallel input data, the AD5546/AD5556 handle equally well low frequency
+ U2A
OP2177
+10V -10V R1A R1 +5V C1 1F C2 0.1F VDD RCOMA R2 VREFA ROFSA ROFS RFBA C6 RFB C5 0.1F V+ U2B V- C8 1F WR LDAC RS WR LDAC RS MSB MSB C9 0.1F -15V +15V C4 1F - C7
AD5546/AD5556
GND 16/14 DATA
U1
16/14-BIT
IOUT
-
OP2177
+
VOUT
Figure 24. Signal Attenuator with AC Reference
+5V C1 1F C2 0.1F 2 VIN U3 + R3 470k U4 V+ U2A V-
ADR03
TRIM VOUT GND 4 5 6
AD5170
10k B R7 1k
AD8628
- C8 0.1F
-5V +2.5V R1A R1 VDD C3 0.1F RCOMA
C9 1F C7
-2.5V
VREFA R2
ROFSA ROFS
RFBA C6 RFB
+5V
C4 1F
AD5546/AD5556
GND 16/14 DATA WR LDAC RS WR LDAC RS MSB MSB
U1
16/14-BIT
IOUT
-
AD8628
+ V-
C5 0.1F V+ U2B
03810-0-024
VOUT 0V TO +2.5V
Figure 25. Full Span Calibration
Rev. 0 | Page 15 of 16
03810-0-025
AD5546/AD5556 OUTLINE DIMENSIONS
9.80 9.70 9.60
28
15
4.50 4.40 4.30
1 14
6.40 BSC
PIN 1 0.65 BSC 0.15 0.05 COPLANARITY 0.10 0.30 0.19 1.20 MAX 8 0 0.75 0.60 0.45
SEATING PLANE
0.20 0.09
COMPLIANT TO JEDEC STANDARDS MO-153AE
Figure 26. 28-Lead Thin Shrink Small Outline Package [TSSOP] RU-28 Dimensions shown in millimeters
ORDERING GUIDE
Model AD5546BRU AD5546BRU-REEL7 AD5556CRU AD5556CRU-REEL7 RES (Bit) 16 16 14 14 DNL (LSB) 1 1 1 1 INL (LSB) 2 2 1 1 Temperature Range (C) -40 to +125 -40 to +125 -40 to +125 -40 to +125 Ordering Quantity 50 1000 50 1000 Package Description TSSOP-28 TSSOP-28 TSSOP-28 TSSOP-28 Package Option RU-28 RU-28 RU-28 RU-28
(c) 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D03810-0-1/04(0)
Rev. 0 | Page 16 of 16

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